1. Field of the Invention
This invention relates to, for example, a NAND flash EEPROM, and more particularly to a semiconductor memory device capable of storing multivalued data in a single memory cell.
2. Description of the Related Art
A NAND flash EEPROM which stores multivalued data in a single memory cell requires a plurality of voltages corresponding to multivalued data. Specifically, in writing data, the NAND flash EEPROM requires a plurality of verify voltages to verify the write data. In reading data, it requires a plurality of read voltages corresponding to the read-out data (refer to, for example, Jpn. Pat. Appln. KOKAI Publication No. 2004-192789).
In a multivalued memory, the voltages corresponding to the individual threshold levels vary according to the performances of the individual chips. That is, variations in the manufacturing process cause the characteristics of the individual chips to differ, resulting in variations in the voltages corresponding to the individual threshold levels. Moreover, the voltage generating circuit which generates a verify voltage and a read voltage is also affected by variations in the manufacturing process. To overcome this drawback, the voltage generating circuit has a trimming circuit so as to be capable of generating the required voltage according to the characteristic of the memory cell, which makes it possible to generate an accurate voltage.
In a conventional multivalued memory, the verify voltage and read voltage are set in, for example, a die sort test. A plurality of items of trimming data (voltage data) for generating the voltages are stored in, for example, an EEPROM as electric fuses in the chip. The data stored in the EEPROM is read when the power supply for the chip is turned on. According to the data, the resistance values constituting the trimming circuit of the voltage generating circuit is set.
The trimming circuit, which generally has a resistance and a switch which changes the value of the resistance, causes the switch to change over, thereby changing the output voltage. The signal causing the switch to change over is generated by decoding the trimming data. In the trimming circuit, the smaller the variation in output voltage, the more the accuracy of the output voltage (or threshold level) can be improved. However, as a result of improving the accuracy of the output voltage, the number of trimming data items tends to increase. As described above, the trimming data is stored in EEPROM cells acting as electric fuses and held in registers. Therefore, an increase in the trimming data leads to an increase in the number of EEPROM cells and that of registers.
For example, when eight-valued data is stored in a single memory cell, threshold level 0 to threshold level 7 are needed. When eight-valued threshold levels are written in a memory cell, eight verify voltages are needed. For example, when the verify voltage for threshold level 7 is 4.55V, if the voltage trimming range is +40% to −40%, the voltage is in the range of 2.73V to 6.37V. when the voltage is trimmed at intervals of 50 mV, 73 parameters are required as trimming data.
Moreover, to read eight-valued threshold levels stored in the memory cell, eight read voltages are needed. When one read voltage is trimmed, for example, 65 parameters are needed as trimming data.
As described above, when the number of data items stored in a single memory is made large, the number of parameters for generating the verify voltage and read voltages becomes enormous. The number of EEPROM cells and registers to store the parameters also increases sharply, which causes a problem: the percentage of the area occupied by the EEPROM cells and registers increases. Accordingly, a semiconductor memory device has been desired which is capable of reducing remarkably the number of parameters for generating the read voltages corresponding to the threshold levels.